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Xilinx Training Courses

Connectivity Design Courses
How to Design a Xilinx Connectivity System in 1 Day
This workshop introduces you to fundamental connectivity concepts and techniques for implementation in Xilinx FPGAs. The focus is on fundamental aspects of transceivers, PCIe® technology, memory interfaces, and Ethernet MACs. Design examples and labs are drawn from the Connectivity Targeted Reference Design (TRD). In addition, an IBERT lab is available that highlights use of the MGT.

PCIe Protocol Overview
This course focuses on the fundamentals of the PCI Express® protocol specification. The typical PCIe® architecture, including data space, data movement, and the most commonly used Transaction Layer Packets (TLPs) are covered. Interrupts and error handling are also discussed. Implementation issues are covered in the two-day Designing a LogiCORE PCI Express System course. - Test Your Knowledge

Designing a LogiCORE PCI Express System
Attending the Designing a LogiCORE PCI Express System will provide you a working knowledge of how to implement a Xilinx PCI Express core in your applications. This course focuses on the implementation of a Xilinx PCI Express system within the Connectivity Targeted Reference Design (TRD). With this experience, you can improve your time to market with your PCIe core design. Various Xilinx PCI Express core products will be enumerated to aid you in selecting the proper solution. This course focuses on the AXI streaming interconnect. - Test Your Knowledge

Designing with Ethernet MAC Controllers
Become acquainted with the various solutions that Xilinx offers for Ethernet connectivity. Learn the basics of the Ethernet standard, protocol, and OSI model while applying Xilinx solutions via hands-on laboratory exercises. Perform simulation to understand fundamental principles and obtain the knowledge to assess hardware design considerations and software development requirements.

Designing with Multi-Gigabit Serial I/O
Learn how to employ GTP and GTX serial transceivers in your Spartan-6 LXT FPGA or Virtex-6 FPGA design. Understand and utilize the features of the RocketIO transceiver blocks, such as 8B/10B and 64B/66B encoding, channel bonding, clock correction, and comma detection. Additional topics include use of the Architecture Wizard, synthesis and implementation considerations, board design as it relates to the transceivers, and test and debugging. This course combines lectures with practical hands-on labs. - Test Your Knowledge

How to Design a High-Speed Memory Interface
This course teaches hardware designers who are new to high-speed memory I/O to design a memory interface in Xilinx FPGAs. It introduces designers to the basic concepts of high-speed memory I/O design, implementation, and debugging using Spartan®-6 and Virtex®-6 FPGAs. Additionally, you will learn about the tools available for high-speed memory interface design, implementation, and debugging. - Test Your Knowledge

Signal Integrity and Board Design for Xilinx FPGAs
Learn when and how to apply signal integrity techniques to high-speed interfaces between Xilinx FPGAs and other components. This comprehensive course combines design technique and methodology with relevant background concepts of high-speed bus and clock design, including transmission line termination, loading, and jitter. - Test Your Knowledge

CPLD Design Courses
Fundamentals of CPLD Design
This comprehensive course provides you with an introduction to designing with Xilinx CPLDs by using the ISE series software tools. You will learn the basics of ISE software flow and how to interpret CPLD reports for optimum performance designs. This course covers ISE features such as the Constraints Editor and PACE. - Test Your Knowledge

Designing for Performance for CPLDs
Designing for Performance for CPLDs is an intermediate-level course that provides a comprehensive overview of the CPLD software flow. By applying the techniques presented in this course, you will be able to enhance design performance and make the best possible use of Xilinx CPLD architectures. - Test Your Knowledge

DSP Design Courses
How to Design a Xilinx DSP System in 1 Day
The workshop introduces you to fundamental DSP concepts, algorithms, and techniques for implementation in Xilinx FPGAs. Design examples and labs are drawn from several common applications spaces, including wireless communications, video, and imaging. The material is also complementary to the Avnet SpeedWay Design Workshop on FPGA-Based System Design with High-Speed Data Converters.

Essential DSP Implementation Techniques for Xilinx FPGAs
This course provides a foundation for Digital Signal Processing (DSP) techniques for Xilinx FPGAs. The course begins with a refresher of basic binary number theory, mathematics, and the essential features within the FPGA that are important to signal processing. The body of the course explores a variety of filter techniques with emphasis on optimal implementation in Xilinx devices and continues with an examination of FFTs, video, and image processing. - Test Your Knowledge

DSP Design Using System Generator
This course allows you to explore the System Generator tool and to gain the expertise you need to develop advanced, low-cost Digital Signal Processing designs. This intermediate course in implementing DSP functions focuses on learning how to use System Generator for DSP, design implementation tools, and hardware co-simulation verification. - Test Your Knowledge

Embedded Design Courses
How to Design Xilinx Embedded Systems in 1 Day
The workshop introduces you to fundamental embedded design concepts and techniques for implementation in Xilinx FPGAs. The focus is on fundamental aspects of Xilinx embedded tools, IP, and the Embedded Targeted Reference Design (TRD). Design examples and labs are drawn from the Embedded TRD.

Essentials of Microprocessors
Learn what makes microprocessors tick! This class offers insights into all major aspects of microprocessors, from registers through coprocessors and everything in between. Differences between RISC and CISC architectures are explored as well as the concept of interrupts. A generic microprocessor is programmed and run in simulation to reinforce the principles learned in the lecture modules. The student will leave the class well prepared for the Xilinx Zynq training curriculum. - Test Your Knowledge

Embedded Systems Design
Xilinx FPGAs provide a new level of system design capabilities through soft MicroBlaze processors, hard PowerPC® processors, AXI interconnect, and silicon-efficient architectural resources. This course brings experienced FPGA designers up to speed on developing embedded systems using the Embedded Development Kit (EDK). The features and capabilities of the Xilinx MicroBlaze soft processor are also included in the lectures and labs. The hands-on labs provide experience with the development, debugging, and simulation of an embedded system. - Test Your Knowledge

Advanced Embedded Systems Design
Advanced Features and Techniques of Embedded Systems Design provides embedded systems developers the necessary skills to develop complex embedded systems and enables them to improve their designs by using the tools available in the Embedded Development Kit (EDK). This course also helps developers understand and utilize advanced components of embedded systems design for architecting a complex system. - Test Your Knowledge

Embedded Systems Software Development
Topics are comprehensive, covering the design and implementation of the board support package for resource access and management. Major topics include device driver use and custom development, and user application debugging and integration. Practical implementation tips and best practices are also provided throughout to enable you to make good design decisions and keep your design cycles to a minimum. You will have enough practical information to start developing software applications for a Xilinx embedded system based on a MicroBlaze processor. - Test Your Knowledge

Embedded Linux on the MicroBlaze Processor
This intermediate-level, two-day course provides embedded systems developers with experience in creating an embedded PetaLinux SDK operating system on a Xilinx MicroBlaze processor development board. The course offers students hands-on experience on building the environment and booting the system using a basic, single-processor System on Chip (SoC) design with PetaLinux SDK on the MicroBlaze processor. - Test Your Knowledge

FPGA Design Courses
Essentials of FPGA Design
Use the ISE software tools to implement a design and gain a firm understanding of the Xilinx FPGA architecture. Learn the best design practices from the pros and understand the subtleties of the Xilinx design flow. - Test Your Knowledge

Designing for Performance
Attending the Designing for Performance class will help you create more efficient designs. This course can help you fit your design into a smaller FPGA or a lower speed grade for reducing system costs. In addition, by mastering the tools and the design methodologies presented in this course, you will be able to create your design faster, shorten your development time, and lower development costs. - Test Your Knowledge

Essential Design and Analysis with PlanAhead
Learn to increase design performance and achieve repeatable results by using the PlanAhead™ software. Topics include: a product overview, synthesis and project tips, design analysis, creating a floorplan, improving performance, experimenting with implementation options, incremental methodology, block-based IP design, and I/O pin assignment. - Test Your Knowledge

Advanced Design and Analysis with PlanAhead
Learn to increase design performance and achieve repeatable performance by using the PlanAhead software tool. Topics include: synthesis and project tips, design analysis, creating a floorplan, improving performance with area constraints and Pblocks, design debugging with the ChipScope™ Pro tool, and design preservation with partitions. - Test Your Knowledge

Xilinx Partial Reconfiguration Tools and Techniques
This course demonstrates how to use the ISE, PlanAhead, and Embedded Development Kit (EDK) software tools to construct, implement, and download a Partially Reconfigurable (PR) FPGA design. You will gain a firm understanding of PR technology and learn how successful PR designs are completed. You will also identify best design practices and understand the subtleties of the PR design flow. - Test Your Knowledge

Debugging Techniques Using the ChipScope Pro Tools
As FPGA designs become increasingly more complex, designers continue look to reduce design and debug time. The powerful, yet easy-to-use ChipScope Pro tool solution helps minimize the amount of time required for verification and debug. This two-day course will not only introduce you to the cores and tools and illustrate how to use the triggers effectively, but also show you effective ways to debug logic and high-speed designs—thereby decreasing your overall design development time. - Test Your Knowledge

Designing with the 7 Series Families
Are you interested in learning how to effectively utilize 7 series architectural resources? This course supports both experienced and less experienced FPGA designers who have already completed the Essentials of FPGA Design course. This course focuses on understanding as well as how to properly design for the primary resources found in this popular device family. - Test Your Knowledge

Designing with the Spartan-6 and Virtex-6 Families
Are you interested in learning how to effectively utilize Spartan-6 FPGA or Virtex-6 FPGA architectural resources? This course supports both experienced and less experienced FPGA designers who have already completed the Essentials of FPGA Design course. This course focuses on understanding as well as how to properly design for the primary resources found in these popular device families. - Test Your Knowledge

Designing with the Virtex-5 FPGA Family
Interested in learning how to effectively utilize Virtex-5 FPGA architectural resources? Targeted towards experienced Xilinx users who have already completed Essentials of FPGA Design and Designing for Performance, this course focuses on understanding as well as designing into several of the new and enhanced resources found in our newest device. - Test Your Knowledge

FPGA Design Techniques for Lower Cost
This course appeals to engineers who have an interest in developing low-cost products, particularly in high-volume markets. The course and exercises cover several different design techniques, which will be interesting and challenging for any digital designer regardless of the final application.

ISE Design Tool Flow
ISE Design Tool Flow provides the overall context and framework for the development cycle of FPGAs. For those uninitiated to FPGA design, this course will arm you with the proper planning techniques, strategy, and FPGA tool flow to get up and designing an FPGA design now. - Test Your Knowledge

Advanced FPGA Implementation
Advanced FPGA Implementation tackles the most sophisticated aspects of the ISE design suite and Xilinx hardware. Seven labs provide hands-on experience in this two-day training and cover the Xilinx Synthesis Technology (XST) tools. This course requires the Essentials of FPGA Design and Designing for Performance courses as prerequisites. An intermediate knowledge of Verilog or VHDL is strongly recommended as is at least six months of design experience with Xilinx tools and FPGAs. The lecture material in this course covers the ISE tools and the Spartan-6 and Virtex-6 FPGAs - Test Your Knowledge

Languages
Designing with VHDL
This comprehensive course is a thorough introduction to the VHDL language. The emphasis is on writing solid synthesizable code and enough simulation code to write a viable testbench. Structural, Register Transfer Level (RTL), and behavioral coding styles are covered. This class addresses targeting Xilinx devices specifically and FPGA devices in general. The information gained can be applied to any digital design by using a top-down synthesis design approach. You will also learn best coding practices that will increase your overall VHDL proficiency and prepare you for the Advanced VHDL course. - Test Your Knowledge

Advanced VHDL
Increase your VHDL proficiency by learning advanced techniques that help you write more robust and reusable code. This comprehensive course is targeted toward designers who already have some experience with VHDL. The course highlights modeling, testbenches, RTL/synthesizable design, and techniques aimed at creating parameterizable and reusable designs. The majority of class time is spent in challenging hands-on labs as compared to lecture modules. - Test Your Knowledge

Designing with Verilog
This comprehensive course is a thorough introduction to the Verilog language. The emphasis is on writing Register Transfer Level (RTL) and behavioral source code. This class addresses targeting Xilinx devices specifically and FPGA devices in general. The information gained can be applied to any digital design by using a top-down synthesis design approach. This course combines insightful lectures with practical lab exercises to reinforce key concepts. You will also learn advanced coding techniques that will increase your overall Verilog proficiency and enhance your FPGA optimization. This course covers Verilog 1995 and 2001. - Test Your Knowledge

Management
Xilinx for Managers
Hosted by the president of Bottom Line Technologies, this roundtable style course was created to meet the needs of managers who find themselves in charge of FPGA-based projects even though they have little or dated FPGA design experience.

Recognizing and mitigating risk, understanding the factors that can shrink or balloon schedules, and knowing how to deal with or, better, avoid problems are all covered.

After hands-on exposure to Xilinx's silicon and software, and a networking lunch, the focus shifts to best practices and approaches to FPGA design. We wrap up by addressing the personnel and project management challenges common to FPGA-based project development.