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Fundamentals of FPGA Design

Use the ISE™ software tools to implement a design and gain a firm understanding of the Xilinx FPGA architecture. Learn the best design practices from the pros and understand the subtleties of the Xilinx design flow.

This course covers ISE features, such as the Architecture Wizard and the Floorplan Editor. Other topics include design planning, implementation options, and global timing constraints. For more emphasis on improving the overall design performance, take the follow-up course Designing for Performance, which builds on the basic principles covered in this course.

Note that one of the prerequisites of Fundamentals of FPGA Design is the completion of the basic FPGA architecture modules listed below. Go to www.xilinx.com/education and click the Recorded e-Learning link to view these recorded modules.

Level
Fundamental

Duration
1 Day

Who Should Attend
Digital designers who have a working knowledge of HDL (VHDL or Verilog) and who are new to Xilinx FPGAs

Software Tools
ISE™ Foundation� software 10.1 with the ISE Simulator

Skills Gained
After completing this comprehensive training, you will have the necessary skills to:

Use Xilinx Project Navigator to implement an FPGA design

Assign pin locations with the Floorplan Editor tool

Create DCM instantiations with the Architecture Wizard

Read reports to determine whether design goals were met

Use the Constraints Editor to enter basic global timing constraints

Locate and modify implementation options

Course Outline

Course Agenda

Xilinx Tool Flow

Lab 1: Xilinx Tool Flow

Reading Reports

Lab 2: Architecture Wizard and Floorplan Editor

Lab 3: Pre-Assigning I/O Pins

Global Timing Constraints

Lab 4: Global Timing Constraints

Implementation Options

Lab 5: Implementation Options

Synchronous Design Techniques

Course Summary

Labs

Lab 1: Xilinx Tool Flow – Create a new project in the ISE Project Navigator and use the Architecture Wizard and the Floorplan Editor in the design process. Implement a design by using default software options. The design will be simulated.

Lab 2: Architecture Wizard and Floorplan Editor – Use the Architecture Wizard to customize a DCM and incorporate the DCM into the design. Use the Floorplan Editor to assign pin locations and implement the design.

Lab 3: Pre-Assigning I/O Pins – Pre-Assigning I/O Pins Using PinAhead � This lab introduces the basics of making good I/O pin assignments with PinAhead. Perform Weighted Average Simultaneously Switching Output (WASSO) analysis to avoid ground bounce and use the Design Rule Checker to follow I/O banking rules.

Lab 4: Global Timing Constraints – Enter global timing constraints with the Xilinx Constraints Editor. Review the Post-Map Static Timing Report to verify that the timing constraints are realistic. Use the Post-Place & Route Static Timing Report to determine the delay of the longest constrained path for each timing constraint.

Lab 5: Implementation Options – Adjust process properties and I/O configuration options to improve the design performance.

Prerequisites

Basic FPGA Architecture: Slice and I/O Resources REL*
Basic FPGA Architecture: Memory and Clocking REL*
Basic FPGA Architecture: Architecture Wizard and Floorplan Editor REL*
Working HDL knowledge (VHDL or Verilog)
Digital design experience

* Opens new window on Xilinx Website

Recommended

Basic HDL Coding Techniques REL* (parts 1 and 2)

Spartan-3 FPGA HDL Coding Techniques REL* (parts 1 and 2)

Virtex-5 FPGA HDL Coding Techniques REL* (parts 1 and 2)

Scheduled Sessions

Columbia,MD - Genesis Mid Atlantic	6/9/2009 through 6/9/2009
Rochester,NY - Avnet	7/28/2009 through 7/28/2009
Parsippany,NJ - TBD	9/8/2009 through 9/8/2009
Columbia,MD - Genesis Mid Atlantic	9/15/2009 through 9/15/2009
Plymouth Meeting,PA - SpringHill Suites	9/22/2009 through 9/22/2009

Education Investment Options

Course & Basic Follow-on Coaching	$900	REGISTER
Course & Comprehensive Follow-on Coaching	$1,500	REGISTER
Course Only	$700	REGISTER
Course Only	7 Training Credits	REGISTER
Basic Coaching ala Carte	Not currently offered	REGISTER
S3 Board & 1 hour support	$450	REGISTER
V4 Board & 1 hour support	$800	REGISTER
V5 Board & 1 hour support	$1,900	REGISTER

Basic follow-on coaching includes 2 hours (max 4 calls)

Comprehensive follow-on coaching includes 8 hours (max 12 calls)