Junior Engineer

Junior Engineer - Email: hr@bltinc.com

Responsibilities and requirements include:

Digital logic design, simulation and implementation
Generation of project documentation both technical and managerial.
Teaching VHDL, Verilog and Xilinx specific tools classes.
Location: MD Design Center
US Citizenship Required
Able and willing to obtain TS-SCI fully polly clearance.

The fulfillment of these responsibilities will require the Junior Engineer to be highly flexible and mature. A knowledge of HDLs and FPGA design and excellent communication and presentation skills are required. In addition to the formal responsibilities of the position, you should be prepared to assist in all areas of company operations. Some overnight travel will be required. Full time position reporting to an Engineering Project Manager.

BLT is ONLY seeking the best of the best of the best!
FPGA skills: 8-10 out of 10 and (ideally) DSP skills: 7-10 out of 10

If you think you're among the best, we're looking forward to meeting you.

Note: BLT is comprised mostly of engineers at the Project Manager level. Only a very limited number of Junior Engineering positions for select engineers are available.